1 C2M0040120D silicon carbide power mosfet z -fe t tm mosfet n-channel enhancement mode features ? high speed switching with low capacitances ? high blocking voltage with low r ds(on) ? easy to parallel and simple to drive ? resistant to latch-up ? halogen free, rohs compliant benefts ? higher system effciency ? increased system switching frequency ? reduced cooling requirements ? increased system reliability applications ? solar inverters ? switch mode power supplies ? high voltage dc/dc converters ? motor drive package to-247-3 part number package C2M0040120D to-247-3 v ds 1200 v i d @ 25?c 60 a r ds(on) 40 m ? maximum ratings (t c = 25 ?c unless otherwise specifed) symbol parameter value unit test conditions note i ds (dc) continuous drain current 60 a v gs = 20 v, t c = 25 c fig. 19 40 v gs = 20 v, t c = 100 c i ds (pulse) pulsed drain current 160 a pulse width t p limited by t jmax t c = 25 c fig. 22 v gs gate source voltage -10/+25 v p tot power dissipation 330 w t c =25 c, t j = 150 c fig. 20 t j , t stg operating junction and storage temperature -55 to +150 ?c t l solder temperature 260 ?c 1.6 mm (0.063) from case for 10s m d mounting torque 1 8.8 nm lbf-in m3 or 6-32 screw C2M0040120D rev -
2 electrical characteristics (t c = 25?c unless otherwise specifed) symbol parameter min. typ. max. unit test conditions note v (br)dss drain-source breakdown voltage 1200 v v gs = 0 v, i d = 50 a v gs(th) gate threshold voltage 2.4 2.8 v v ds = 10 v, i d = 10ma fig. 11 1.8 2.0 v v ds = 10 v , i d = 10ma, t j = 150 c i dss zero gate voltage drain current 1 100 a v ds = 1200 v, v gs = 0 v i gss gate-source leakage current 250 na v gs = 20 v, v ds = 0 v r ds(on) drain-source on-state resistance 40 52 m? v gs = 20 v, i d = 40 a fig. 4,5,6 84 100 v gs = 20 v, i d = 40 a, t j = 150 c g fs transconductance 15.1 s v ds = 20 v, i ds = 40 a fig. 7 13.2 v ds = 20 v, i ds = 40 a, t j = 150 c c iss input capacitance 1893 pf v gs = 0 v v ds = 1000 v f = 1 mhz v ac = 25 mv fig. 17,18 c oss output capacitance 150 c rss reverse transfer capacitance 10 e oss c oss stored energy 82 j fig 16 t d(on) turn-on delay time 14.8 ns v dd = 800 v, v gs = -5/20 v i d = 40 a, r g(ext) = 2.5 , r l = 16 timing relative to v ds per iec60747-8-4 pg 83 fig. 27 t r rise time 52 t d(off) turn-off delay time 26.4 t f fall time 34.4 e on turn-on switching loss 1.0 mj v ds = 800 v, v gs = -5/20 v, i d = 40a, r g(ext) = 2.5?, l= 80 h fig. 25 e off turn off switching loss 0.4 r g internal gate resistance 1.8 f = 1 mhz , v ac = 25 mv, esr of c iss built-in sic body diode characteristics symbol parameter typ. max. unit test conditions note v sd diode forward voltage 3.6 v v gs = - 5 v, i sd = 20 a, t j = 25 c note 1 3.3 v v gs = - 5 v, i sd = 20 a, t j = 150 c t rr reverse recover time 54 ns v gs = - 5 v, i sd = 40 a t j = 25 c vr = 800 v dif/dt = 1000 a/s note 1 q rr reverse recovery charge 283 nc i rrm peak reverse recovery current 15 a note (1): when using sic body diode the maximum recommended v gs = -5v thermal characteristics symbol parameter typ. max. unit test conditions note r jc thermal resistance from junction to case 0.34 0.38 c/w fig. 21 r jc thermal resistance from junction to ambient 40 gate charge characteristics symbol parameter typ. max. unit test conditions note q gs gate to source charge 28 nc v ds = 800 v, v gs = -5/20 v i d = 40 a per iec60747-8-4 pg 21 fig. 12 q gd gate to drain charge 37 q g gate charge total 115 C2M0040120D rev -
3 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 - 50 - 25 0 25 50 75 100 125 150 on resistance, r ds on (p.u.) junction temperature, t j ( c) conditions: i ds = 40 a v gs = 20 v t p < 200 s 0 20 40 60 80 100 0.0 2.5 5.0 7.5 10.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 150 c tp < 200 s v gs = 20 v v gs = 10 v v gs = 18 v v gs = 16 v v gs = 14 v v gs = 12 v 0 20 40 60 80 100 0.0 2.5 5.0 7.5 10.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = - 55 c tp < 200 s v gs = 20 v v gs = 10 v v gs = 18 v v gs = 16 v v gs = 14 v v gs = 12 v 0 20 40 60 80 100 0.0 2.5 5.0 7.5 10.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 25 c tp < 200 s v gs = 20 v v gs = 10 v v gs = 18 v v gs = 16 v v gs = 14 v v gs = 12 v figure 2. typical output characteristics t j = 25 c typical performance figure 1. typical output characteristics t j = -55 c 0 20 40 60 80 100 120 140 0 20 40 60 80 100 on resistance, r ds on (mohms) drain - source current, i ds (a) conditions: v gs = 20 v t p < 200 s t j = 150 c t j = - 55 c t j = 25 c 0 20 40 60 80 100 120 140 - 50 - 25 0 25 50 75 100 125 150 on resistance, r ds on (mohms) junction temperature, t j ( c) conditions: i ds = 40 a t p < 200 s v gs = 20 v v gs = 18 v v gs = 16 v v gs = 14 v figure 3. typical output characteristics t j = 150 c figure 4. normalized on-resistance vs. temperature figure 6. on-resistance vs. temperature for various gate voltage figure 5. on-resistance vs. drain current for various temperatures C2M0040120D rev -
4 typical performance 0 10 20 30 40 50 60 0 2 4 6 8 10 12 14 drain - source current, i ds (a) gate - source voltage, v gs (v) conditions: v ds = 20 v tp < 200 s t j = 150 c t j = - 55 c t j = 25 c - 100 - 80 - 60 - 40 - 20 0 - 6 - 5 - 4 - 3 - 2 - 1 0 drain - source current, i ds (a) drain - source voltage, v ds (a) v gs = 0 v v gs = - 2 v v gs = - 5 v condition: t j = - 55 c t p < 200 s - 100 - 80 - 60 - 40 - 20 0 - 6 - 5 - 4 - 3 - 2 - 1 0 drain - source current, i ds (a) drain - source voltage, v ds (a) v gs = 0 v v gs = - 2 v v gs = - 5 v condition: t j = 25 c t p < 200 s - 100 - 80 - 60 - 40 - 20 0 - 6 - 5 - 4 - 3 - 2 - 1 0 drain - source current, i ds (a) drain - source voltage, v ds (a) v gs = 0 v v gs = - 2 v v gs = - 5 v condition: t j = 150 c t p < 200 s 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 - 50 - 25 0 25 50 75 100 125 150 threshold voltage, v th (v) junction temperature t j ( c) conditions v ds = 10 v i ds = 0.5 ma conditions v ds = 10 v i ds = 10 ma typ min - 5 0 5 10 15 20 25 0 20 40 60 80 100 120 140 gate - source voltage, v gs (v) gate charge, q g (nc) conditions: i ds = 40 a i gs = 100 ma v ds = 800 v t j = 25 c figure 7. typical transfer characteristic for various temperatures figure 8. typical body diode characteristic t j = -55 oc figure 9. typical body diode characteristic t j = 25 oc figure 10. typical body diode characteristic t j = 150 oc figure 11. typical and minimum threshold voltage vs. temperature figure 12. typical gate charge characteristic 25 oc C2M0040120D rev -
5 1 10 100 1000 10000 0 50 100 150 200 capacitance (pf) drain - source voltage, v ds (v) c iss c oss conditions: t j = 25 c v ac = 25 mv f = 1 mhz c rss typical performance - 100 - 80 - 60 - 40 - 20 0 - 6 - 5 - 4 - 3 - 2 - 1 0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = - 55 c tp < 200 s v gs = 0 v v gs = 5 v v gs = 10 v v gs = 15 v v gs = 20 v - 100 - 80 - 60 - 40 - 20 0 - 6 - 5 - 4 - 3 - 2 - 1 0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 25 c tp < 200 s v gs = 0 v v gs = 5 v v gs = 10 v v gs = 15 v v gs = 20 v - 100 - 80 - 60 - 40 - 20 0 - 6 - 5 - 4 - 3 - 2 - 1 0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 150 c tp < 200 s v gs = 0 v v gs = 5 v v gs = 10 v v gs = 15 v v gs = 20 v 0 20 40 60 80 100 0 200 400 600 800 1000 1200 stored energy, e oss (j) drain to source voltage, v ds (v) 1 10 100 1000 10000 0 200 400 600 800 1000 capacitance (pf) drain - source voltage, v ds (v) c iss c oss conditions: t j = 25 c v ac = 25 mv f = 1 mhz c rss figure 13. typical 3rd quadrant characteristic t j = -55 oc figure 14. typical 3rd quadrant characteristic t j = 25 oc figure 15. typical 3rd quadrant characteristic t j = 150 oc figure 16. typical output capacitor stored energy figure 17. typical capacitances vs drain voltage (0-200 v) figure 18. typical capacitances vs drain voltage (0-1000 v) C2M0040120D rev -
6 0 1 2 3 4 5 6 0 10 20 30 40 50 60 70 80 90 switching energy (mj) drain to source current, i ds (a) conditions: t j = 25 c v dd = 800 v r g(ext) = 2.5 ? v gs = - 5/+20 v fwd = c4d20120a l = 80 h e off e on e total typical performance 0 10 20 30 40 50 60 70 - 55 - 5 45 95 145 drain - source continous current, i ds (dc) (a) case temperature, t c ( c) conditions: t j 150 c 0 50 100 150 200 250 300 350 - 55 - 5 45 95 145 maximum dissipated power, p tot (w) case temperature, t c ( c) conditions: t j 150 c 100e - 6 1e - 3 10e - 3 100e - 3 1 1e - 6 10e - 6 100e - 6 1e - 3 10e - 3 100e - 3 1 junction to case impedance, z thjc ( o c/w) time, t p (s) 0.5 0.3 0.1 0.05 0.02 0.01 singlepulse 0.01 0.10 1.00 10.00 100.00 0.1 1 10 100 1000 drain - source current, i ds (a) drain - source voltage, v ds (v) 100 s 1 ms 10 s conditions: t c = 25 c d = 0, parameter: t p 100 ms limited by r ds on 0 0.5 1 1.5 2 2.5 3 3.5 4 0 10 20 30 40 50 60 70 80 90 switching energy (mj) drain to source current, i ds (a) conditions: t j = 25 c v dd = 600 v r g(ext) = 2.5 ? v gs = - 5/+20 v fwd = c4d20120a l = 80 h e off e on e total figure 20. power dissipation derating cure figure 19. continuous i ds current derating cure figure 21. typical transient thermal impedance (junction - case) with duty cycle figure 22. safe operating area figure 23. clamped inductie switching energy s. drain current (v dd = 800v) figure 24. clamped inductie switching energy s. drain current (v dd = 600v) C2M0040120D rev -
7 typical performance 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 5 10 15 20 25 30 switching loss (mj) external gate resistor rg(ext) (ohms) e off e on e total conditions: t j = 25 c v dd = 800 v i ds = 40 a v gs = - 5/+20 v fwd = c4d20120a l = 80 h 0.0 0.5 1.0 1.5 2.0 2.5 - 50 - 25 0 25 50 75 100 125 150 swithcing loss (mj) junction temperature, t j ( c) conditions: i ds = 40 a v dd = 800 v r g(ext) = 2.5 ? v gs = - 5/+20 v fwd = c4d20120a l = 80 h e off e on e total 0 10 20 30 40 50 60 70 80 90 100 0 4 8 12 16 20 time (ns) external gate resistor, r g(ext) (ohms) conditions: t j = 25 c v dd = 800 v r l = 20 ? v gs = - 5/+20 v t d (off) t d (on) t f t r figure 25. clamped inductive switching energy vs. r g(ext) figure 26. clamped inductive switching energy vs. junction temperature figure 27. resistive switching times vs. external gate resistor (v dd = 800v, i d = 40a) figure 28. resistive switching time description C2M0040120D rev -
8 test circuit schematic figure 30. clamped inductive switching waveform test circuit esd test total devices sampled resulting classifcation esd-hbm all devices passed 1000v 2 (>2000v) esd-mm all devices passed 400v c (>400v) esd-cdm all devices passed 1000v iv (>1000v) esd ratings c dc =42. 3 uf l = 80 uh q 1 d 1 c4d 20120 a 20 a, 1200 v sic schott ky v dc d.u. t c2 m0040120 d c dc = 42. 3 uf l = 80 uh q 2 v dc d.u. t c2m 0040 120 d q 1 v gs = - 5v c 2m0040120 d figure 31. body diode recovery test circuit C2M0040120D rev -
9 package dimensions package to-247-3 recommended solder pad layout to-247-3 pos inches millimeters min max min max a .190 .205 4.83 5.21 a1 .090 .100 2.29 2.54 a2 .075 .085 1.91 2.16 b .042 .052 1.07 1.33 b1 .075 .095 1.91 2.41 b2 .075 .085 1.91 2.16 b3 .113 .133 2.87 3.38 b4 .113 .123 2.87 3.13 c .022 .027 0.55 0.68 d .819 .831 20.80 21.10 d1 .640 .695 16.25 17.65 d2 .037 .049 0.95 1.25 e .620 .635 15.75 16.13 e1 .516 .557 13.10 14.15 e2 .145 .201 3.68 5.10 e3 .039 .075 1.00 1.90 e4 .487 .529 12.38 13.43 e .214 bsc 5.44 bsc n 3 3 l .780 .800 19.81 20.32 l1 .161 .173 4.10 4.40 ?p .138 .144 3.51 3.65 q .216 .236 5.49 6.00 s .238 .248 6.04 6.30 pinout information: ? pin 1 = gate ? pin 2, 4 = drain ? pin 3 = source part number package marking C2M0040120D to-247-3 c2m0040120 C2M0040120D rev -
10 10 C2M0040120D rev - copyright ? 2014 cree, inc. all rights reserved. the information in this document is subject to change without notice. cree, the cree logo, and zero recovery are registered trademarks of cree, inc. cree, inc. 4600 silicon drive durham, nc 27703 usa tel: +1.919.313.5300 fax: +1.919.313.5451 www.cree.com/power ? rohs compliance the levels of rohs restricted materials in this product are below the maximum concentration values (also referred to as the threshold limits) permitted for such substances, or are used in an exempted application, in accordance with eu directive 2011/65/ec (rohs2), as implemented january 2, 2013. rohs declarations for this product can be obtained from your cree representative or from the product documentation sections of www.cree.com. ? reach compliance reach substances of high concern (svhcs) information is available for this product. since the european chemi - cal agency (echa) has published notice of their intent to frequently revise the svhc listing for the foreseeable future,please contact a cree representative to insure you get the most up-to-date reach svhc declaration. reach banned substance information (reach article 67) is also available upon request. ? this product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human body nor in applications in which failure of the product could lead to death, personal injury or property damage, including but not limited to equipment used in the operation of nuclear facilities, life-support machines, cardiac defbrillators or similar emergency medical equipment, aircraft navigation or communication or control systems, air traffc control systems. notes
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